Digital Logic Design (DI03000111)#
Gujarat Technological University
Program Name: Engineering Level: Diploma
Branch: Information & Communication Technology / Electronics & Communication Engineering
Course Code: DI03000111
Course Name: Digital Logic Design
| w. e. f. Academic Year: | 2024-25 |
|---|---|
| Semester: | 3rd |
| Category of the Course: | PCC |
| Prerequisite: | Not specified |
|---|---|
| Rationale: | Digital technology-the fastest growing technology has revolutionized the electronics industry. In most of the applications digital technology has replaced analogue technology. Digital logic is the heart of digital electronic circuits. A basic understanding of this subject is therefore essential to effective maintenance of the digital electronic devices. The study of this course will enable the students to test the working and rectify the faults of common digital circuits. The syllabus has been designed to make students know about fundamental principles of Digital Electronics and gain familiarity with the available IC chips. |
Course Outcomes#
The course content should be taught and implemented with the aim to develop different types of skills so that students are able to acquire following competency:
| No. | Course Outcomes | RBT Level |
|---|---|---|
| 1 | Interpret various number systems and their conversions to binary number system, and understand binary arithmetic operations. | R, U, A |
| 2 | Implement simplified Boolean equations using logic gates. | R, U, A |
| 3 | Analyze & verify different combinational logic circuits. | R, U, A |
| 4 | Learn about different types of sequential logic circuits. | R, U, A |
| 5 | Classify various memories and logic families. | R, U, A |
*Revised Bloom’s Taxonomy (RBT)
Teaching and Examination Scheme#
| Teaching Scheme (Hours) | Credits | Assessment Pattern and Marks | Total | |||||
|---|---|---|---|---|---|---|---|---|
| L | T | PR | C | Theory ESE (E) | Theory PA(M) | Tutorial/Practical PA(I) | Tutorial/Practical ESE (V) | Total Marks |
| 3 | 0 | 2 | 4 | 70 | 30 | 20 | 30 | 150 |
Course Content#
| Unit No. | Content | No. of Hours | % of Weightage |
|---|---|---|---|
| 1 | Number systems and codes | 8 | 17% |
| 2 | Boolean algebra and logic gates | 10 | 23% |
| 3 | Combinational logic circuits | 10 | 23% |
| 4 | Sequential logic circuits | 10 | 23% |
| 5 | Introduction to Memories and logic families | 7 | 14% |
| Total | 45 | 100% |
Suggested Specification Table with Marks (Theory)#
Distribution of Theory Marks (in %)
| R Level | U Level | A Level | N Level | E Level | C Level |
|---|---|---|---|---|---|
| 26% | 45% | 29% | - | - | - |
Where R: Remember; U: Understanding; A: Application, N: Analyze and E: Evaluate C: Create (as per Revised Bloom’s Taxonomy)
Underpinning Theory#
The major underpinning theory is given below based on the higher level UOs of Revised Bloom’s taxonomy that are formulated for development of the COs and competency. If required, more such UOs could be included by the course teacher to focus on attainment of COs and competency.
| Unit | Major Learning Outcomes | Topics and Sub-topics |
|---|---|---|
| Unit I: Number Systems and Codes | 1a. Interpret the various number systems 1b. Convert a number from one numbering system to another number system 1c. Perform different arithmetic operations on Binary numbers 1d. Interpret the Binary codes | 1.1 Number systems: Binary, Octal, Decimal, Hexadecimal 1.2 Conversion from one number system to another and vice-versa 1.3 Binary arithmetic operations: • 1.3.1 Addition, subtraction, multiplication and division • 1.3.2 1’s and 2’s Complement of binary number & subtraction |
| Unit II: Boolean Algebra and Logic Gates | 2a. Describe functions of logic gates 2b. Explain logic operations, theorems and properties of Boolean algebra 2c. Explain Boolean functions and implement using logic gates 2d. Simplify the Boolean function | 2.1 Boolean algebra and implementations of Boolean function using AND-OR-Invert logic gates 2.2 Universal Gates: NAND & NOR 2.3 Algebraic simplification of Boolean expression using Boolean theorems |
| Unit III: Combinational Logic Circuits | 3a. Explain function of combinational circuits 3b. Implement various combinational circuits 3c. Implement code converter circuit | 3.1 Arithmetic Circuits: Design Half adder, full adder, half subtractor, full subtractor; Block diagram of parallel adder using half and full adder block (up to 4-bit) 3.2 Encoder (4:2, 8:3); Decoder (2:4, 3:8) 3.3 Multiplexers (2:1, 4:1, 8:1); De-multiplexers (1:2, 1:4, 1:8) 3.4 Binary to Gray and Gray to binary code converters up to 4 bits |
| Unit IV: Sequential Logic Circuits | 4a. Describe the function of various types of flip-flops with the help of circuit diagram, truth table 4b. Different triggering methods 4c. Describe the working of shift Registers with the help of circuit diagram, truth table 4d. Explain the working of various types of Counters with the help of circuit diagram, truth table | 4.1 Flip-flops: SR, D, JK, T, Master Slave JK 4.2 Triggering methods 4.3 Shift Registers: Classification - (i) Serial in serial-out, (ii) serial-in parallel-out, (iii) parallel-in serial-out and (iv) parallel-in parallel out 4.4 Counters: Ring Counter, Johnson Counter, 4 bit Asynchronous (Ripple) Counter, 4 bit Synchronous Counter |
| Unit V: Introduction to Memories and Logic Families | 5a. Classify semiconductor Memories 5b. Identify different types of Memories 5c. Compare Logic families 5d. Manage E-waste of Digital ICs/Chips | 5.1 Introduction and Types of Memory: • 5.1.1 RAM (SRAM, DRAM) • 5.1.2 ROM (PROM, EPROM, EEPROM) 5.2 Overview of different logic family Definitions: Fan in, Fan out, Noise margin, Propagation delay, Power dissipation |
References/Suggested Learning Resources#
(a) Books#
| Sr. No. | Title of Book | Author | Publication with place, year and ISBN |
|---|---|---|---|
| 1 | Digital Logic and Computer Design | M. Morris Mano | Pearson Education India; First edition (2016) ISBN-10: 933254252X ISBN-13: 978-9332542525 |
| 2 | Digital Principles and Application | Malvino and Leach | TMH Pub., New Delhi, 7th Edition or latest ISBN-10: 0070141703 ISBN-13: 978-0070141704 |
| 3 | Fundamentals of Digital Circuits | A. Anand Kumar | PHI Learning, New Delhi, 4th Edition ISBN-10: 8120352688 ISBN-13: 978-8120352681 |
| 4 | Modern Digital Electronics | Jain, R P | TMH Education, New Delhi, 4th Edition ISBN-10: 0070669112 ISBN-13: 978-0070669116 |
| 5 | Digital Electronics | Kharate G.K. | OXFORD University Press, 2012 ISBN-10: 0198061838 ISBN-13: 9780198061830 |
| 6 | Digital Electronics | B.R. Gupta, V. Singhal | S K Kataria and Sons (2012) ISBN-10: 9380027885 ISBN-13: 978-8185749600 |
| 7 | A Textbook of Digital Electronics | S. S. Bhatti | I K International Publishing |
(b) Open source software and websites#
Software/Learning Websites:
- NPTEL - Digital Logic Design
- JavaTpoint - Digital Electronics
- JavaTpoint - Combinational Logic Circuits
- Electronics For You - Flip-Flops
- JavaTpoint - Shift Registers
- JavaTpoint - Counters
- TutorialsPoint - Digital Circuits
- MPhysics Tutorial - Semiconductor Memory
- Electrically4U - Digital Logic Families
- Virtual Labs - IIT Roorkee - Virtual Labs for experiments
- Virtual Labs - IIT Kharagpur - Virtual Labs for experiments
- Logisim Circuit Simulator - Educational tool for designing and simulating digital logic circuits
Suggested Course Practical List#
| Sr. No. | Practical Outcomes (PrOs) | Unit No. | Approx. Hours Required |
|---|---|---|---|
| 1 | Build/Test the functionality of Basic and Advance Logic Gates | 2 | 2 hours |
| 2 | Build/Test 2 input basic logic gates using NAND gate | 2 | 2 hours |
| 3 | Build/Test 2 input basic logic gates using NOR gate | 2 | 2 hours |
| 4 | Build/Test logic circuits for De Morgan’s theorems | 2 | 2 hours |
| 5 | Build/Test Half Adder Circuit | 3 | 2 hours |
| 6 | Build/Test Full Adder Circuit using two half adders | 3 | 2 hours |
| 7 | Build/Test Half Subtractor Circuit | 3 | 2 hours |
| 8 | Build/Test Full Subtractor Circuit using two half Subtractors | 3 | 2 hours |
| 9 | Build/Test the Decoder/Encoder circuit | 3 | 2 hours |
| 10 | Build/Test the Multiplexer/Demultiplexer circuit | 3 | 2 hours |
| 11 | Build/Test a circuit to Convert 4 bit Binary to Gray Code using logic gates | 1,3 | 2 hours |
| 12 | Build/Test a circuit to Convert 4 bit Gray to Binary Code using logic gates | 1,3 | 2 hours |
| 13 | Build/Test the functionality of the SR and D Flip-Flop | 4 | 2 hours |
| 14 | Build/Test the functionality of the JK and T Flip-flops | 4 | 2 hours |
| 15 | Build/Test the working of the Shift Register/Ring counter | 4 | 2 hours |
| 16 | Build/Test the working of BCD Counter | 4 | 2 hours |
| 17 | Identify various semiconductor memories (RAM, ROM) from CPU and list their features/specifications | 5 | 2 hours |
| 18 | Identify various Digital Logic families and prepare characteristics comparison | 5 | 2 hours |
| Total: Minimum 15 Practical Exercises | 30 Hours |
Note#
- More Practical Exercises can be designed and offered by the respective course teacher to develop the industry relevant skills/outcomes to match the COs. The above table is only a suggestive list.
- Care must be taken in assigning and assessing study report as it is a first year study report. Study report, data collection and analysis report must be assigned in a group. Teacher has to discuss about type of data (which and why) before group start their market survey. The following are some sample ‘Process’ and ‘Product’ related skills (more may be added/deleted depending on the course) that occur in the above listed Practical Exercises of this course required which are embedded in the COs and ultimately the competency.
| Sr. No. | Sample Performance Indicators for the PrOs | Weightage (%) |
|---|---|---|
| 1 | Prepare experimental setup | 20% |
| 2 | Operate the equipment setup or circuit | 20% |
| 3 | Follow safety measures and practices | 10% |
| 4 | Record and plot observations correctly | 20% |
| 5 | Interpret the result and conclude | 30% |
List of Laboratory/Learning Resources Required#
These major equipments with broad specifications for the PrOs is a guide to procure them by the administrators to ensure uniformity of practicals in all institutions across the state.
| Sr. No. | Equipment Name with Broad Specifications | PrO. No. |
|---|---|---|
| 1 | Digital IC Trainer Kit | 1,2,3,4,5,6,7,8 |
| 2 | Digital Logic Gate ICs (74XX) | 1,2,3,4,5,6,7,8 |
| 3 | Digital Multimeters: Vac, Vdc (10V max), Idc, Iac (10 amp max), Resistance (0 - 100 MΩ), Capacitance, patch cords, Breadboard | 1,2,3,4,5,6,7,8 |
| 4 | Cathode Ray Oscilloscope (20MHz Dual Channel), Function Generator | 1,2,3,4,5,6,7,8 |
| 5 | Verification of NAND and NOR gate as universal gate Trainer Kit | 2,3 |
| 6 | Digital IC Tester | 1,2,3,4,5,6,7,8 |
| 7 | Decoder/Encoder Trainer Kit | 9 |
| 8 | Multiplexer/Demultiplexer Trainer Kit | 10 |
| 9 | Code Converter Trainer Kit | 11,12 |
| 10 | RS/D/T/JK Flip Flop Trainer Kit | 13,14 |
| 11 | Digital Counter Trainer Kit | 15,16 |
| 12 | Different types of Semiconductor Memories (RAM and ROM) | 17 |
Suggested Project List#
Only one micro-project is planned to be undertaken by a student that needs to be assigned to him/her in the beginning of the semester. In the first four semesters, the micro-projects are group-based (group of 3 to 5). However, in the fifth and sixth semesters, the number of students in the group should not exceed three.
The micro-project could be industry application based, internet-based, workshop-based, laboratory-based or field-based. Each micro-project should encompass two or more COs which are in fact, an integration of PrOs, UOs and ADOs. Each student will have to maintain dated work diary consisting of individual contribution in the project work and give a seminar presentation of it before submission. The duration of the micro-project should be about 14-16 (fourteen to sixteen) student engagement hours during the course. The students ought to submit micro-project by the end of the semester to develop the industry-oriented COs.
A suggestive list of micro-projects is given here. This has to match the competency and the COs. Similar micro-projects could be added by the concerned course teacher:
- Implement Logic Gates on General Purpose Board
- Implement simplified Product of Sum (POS) based equation using logic gates on General Purpose Board
- Design Half Adder/Full Adder Circuit on General Purpose Board
- Design Half Subtractor/Full Subtractor Circuit on General Purpose Board
- Design 4:1 Multiplexer on General Purpose Board
- Design 4 bit Gray to Binary code converter on General Purpose Board
- Design 4 bit Binary to Gray code converter on General Purpose Board
- Design any Flip-flop on General Purpose Board
- Design 4-bit Counter on General Purpose Board
- Identify Various types of Memories like Pen Drive, Hard Disk, DVD, Memory Card etc. around you and Prepare a comparison chart of it
- Identify E-Waste of Digital ICs and Prepare a brief Report of Remedies for it
Suggested Activities for Students#
Other than the classroom and laboratory learning, following are the suggested student-related co-curricular activities which can be undertaken to accelerate the attainment of the various outcomes in this course: Students should perform following activities in group and prepare reports of about 5 pages for each activity. They should also collect/record physical evidences for their (student’s) portfolio which may be useful for their placement interviews:
- Read and note down specifications of Digital ICs using data sheet: IC number/Pin Diagram/voltage levels, applications for the following Digital ICs (TTL/CMOS): AND, OR, NOT, NAND, NOR, EXOR, EX-NOR gates, Decoder, Multiplexer, BCD to 7-segment decoder, SR FF, JK FF, D FF, shift Register, Counter, ADC, DAC
- Solve real life problems using binary logic theory and implement it using digital logic circuits
- Explore working of Digital clock/Digital panel
- Prepare micro project using Various Digital IC and display devices
Document prepared by Gujarat Technological University
Academic Year: 2024-25